Non-volatile memory structure and manufacturing method thereof

A method for manufacturing a non-volatile memory structure, comprising:

• providing a substrate having a memory region and a logic region defined thereon, and a dielectric layer and a conductive layer being sequentially formed on the substrate;
• masking the logic region while etching the dielectric layer and the conductive layer in the memory region to form at least a first gate in the memory region;
• forming an oxide-nitride-oxide (ONO) structure under the first gate and near sidewalls of the first gate;
• forming an oxide structure covering the ONO structure on the substrate;
• masking the memory region while etching the conductive layer and the dielectric layer in the logic region to form at least a second gate in the logic region;
• and
• forming a first spacer on sidewalls of the first gate and a second spacer on sidewalls of the second gate simultaneously.