Optimized via cutouts with ground references
AssigneeFujitsu Limited
InventorsYasuo Hidaka, Pradip Thachile
Life of this patent
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AssigneeFujitsu Limited
InventorsYasuo Hidaka, Pradip Thachile
Estimating the term…
The present disclosure relates to a method of optimizing via cutouts, including selecting a geometry of a via cutout on a first ground reference layer adjacent to a first differential trace, the geometry selected to provide an extension region extending in the direction of the first differential trace. Additionally, the method includes the steps of selecting a geometry of the first differential trace, wherein a spacing of the first differential trace in the extension region is different from a spacing of the first differential trace outside the extension region, and selecting a radial dimension of a first and second via cutout on a second ground reference layer adjacent to and between the first and second differential traces, the radial dimension of the first via cutout and the second via cutout selected such that the second ground reference layer remains intact in the area adjacent the second differential trace.
A method of optimizing via cutouts, comprising:
A printed circuit board comprising:
Dependencies are inferred from the claim text.