Apparatus, System, and Method for Matching Patterns with an Ultra Fast Check Engine

A method of operating a check engine, comprising:

• providing a plurality of magnetic random access memory (MRAM) cells in the check engine, each of the plurality of MRAM cells including a storage magnetization and a sense magnetization;
• storing a plurality of reference bits in the plurality of MRAM cells, including during a programming cycle, aligning the storage magnetization of the each of the MRAM cells to store at least one of the plurality of reference bits;
• presenting a plurality of target bits to the plurality of MRAM cells, including during a pattern checking cycle, aligning the sense magnetization of the each of the plurality of MRAM cells to present at least one of the plurality of target bits;
• and
• determining a match between the plurality of target bits and the plurality of reference bits when only a first subset of the plurality of target bits matches a corresponding first subset of the plurality of reference bits.

A method of operating a check engine, comprising:

• providing a plurality of magnetic random access memory (MRAM) cells in the check engine, each of the plurality of MRAM cells including a storage magnetization and a sense magnetization;
• storing a plurality of reference bits in the plurality of MRAM cells, including during a programming cycle, aligning the storage magnetization of the each of the MRAM cells to store at least one of the plurality of reference bits;
• presenting a plurality of target bits to the plurality of MRAM cells, including during a pattern checking cycle, aligning the sense magnetization of the each of the plurality of MRAM cells to present at least one of the plurality of target bits;
• and
• generating an output of each of the MRAM cells, the output representing a level of matching between the at least one of the plurality of target bits and the at least one of the plurality of reference bits, the output being based on a relative alignment between the storage magnetization and the sense magnetization of the each of the MRAM cells;
• and
• generating a combined output of the plurality of MRAM cells based on the output of the each of the MRAM cells, the combined output representing a level of matching between the plurality of target bits and the plurality of reference bits, the plurality of MRAM cells being connected in series.