Tracking speculative execution of instructions for a register renaming data store

A data processing apparatus for processing a stream of program instructions, comprising first processing means for processing at least some of the program instructions, the first processing means comprising:

• a plurality of register means for storing data;
• register renaming means for mapping architectural register specifiers identified by the program instructions to physical register specifiers identifying the plurality of register means;
• and
• renaming data storage means for storing a plurality of renaming entries, each renaming entry for identifying a register mapping between at least one of the architectural register specifiers and at least one of the physical register specifiers;
• wherein:
• at least some renaming entries have a corresponding count value, the count value indicating a number of speculation points occurring between generation of a previous count value and generation of the count value;
• a speculation point comprising a point of program flow of the stream of program instructions following which at least one program instruction is executed speculatively by the data processing apparatus before it is known whether the at least one program instruction should have been executed following the speculation point;
• and
• the count value comprises an N-bit value, where N is an integer and N>1.

A data processing method for processing a stream of program instructions using a data processing apparatus comprising first processing circuitry configured to process at least some of the program instructions, the first processing circuitry comprising a plurality of registers for storing data;

• the method comprising:
• mapping architectural register specifiers identified by the program instructions to physical register specifiers identifying the plurality of registers;
• and
• storing a plurality of renaming entries in a renaming data store, each renaming entry for identifying a register mapping between at least one of the architectural register specifiers and at least one of the physical register specifiers;
• wherein:
• at least some renaming entries have a corresponding count value, the count value indicating a number of speculation points occurring between generation of a previous count value and generation of the count value;
• a speculation point comprising a point of program flow of the stream of program instructions following which at least one program instruction is executed speculatively by the data processing apparatus before it is known whether the at least one program instruction should have been executed following the speculation point;
• and
• the count value comprises an N-bit value, where N is an integer and N>1.

A data processing apparatus for processing a stream of program instructions, comprising first processing circuitry configured to process at least some of the program instructions, the first processing circuitry comprising:

• a plurality of registers for storing data;
• register renaming circuitry configured to map architectural register specifiers identified by the program instructions to physical register specifiers identifying the plurality of registers;
• and
• a renaming data store configured to store a plurality of renaming entries, each renaming entry for identifying a register mapping between at least one of the architectural register specifiers and at least one of the physical register specifiers;
• wherein:
• at least some renaming entries have a corresponding count value, the count value indicating a number of speculation points occurring between generation of a previous count value and generation of the count value, the speculation points comprising branch operations or load/store operations;
• and
• the count value comprises an N-bit value, where N is an integer and N>1.