Robust and secure memory subsystem
OwnerDannie Gerrit Feekesinventor
Life of this patent
Estimating the term…
Loading patent…
OwnerDannie Gerrit Feekesinventor
Estimating the term…
The present disclosure is generally directed to a more robust memory subsystem having a an improved architecture for managing a memory space. In one embodiment, a method is provided that includes receiving a memory access request from a memory controller and attempting to access the requested data from a first level of memory maintained on the memory device that contains the map cache. The method is further configured to perform a lookup in the map cache to determine whether the requested address is resident in the first level of memory. If the requested data is not resident in the first level of memory, the method causes a re-map address to be calculated that identifies a location of the requested data in a lower level of memory. Conversely, if the requested data is resident in the first level of memory, the method provides the memory controller with access to the requested data.
A memory device having an integrated map cache for managing a memory space, the memory device, comprising:
A system for managing a memory address space, comprising:
A method implemented in a memory device having a map cache configured to manage a memory space, the method comprising:
Dependencies are inferred from the claim text.