Direct memory access rate limiting in a communication device

A method comprising:

• determining an ingress rate associated with each of a plurality of software ports of a communication device for providing packets to a packet processing engine via an ingress direct memory access (DMA) unit of the communication device;
• determining an aggregate software port ingress rate of the communication device based on a sum of the ingress rate associated with each of the plurality of software ports of the communication device;
• and
• configuring the ingress DMA unit to provide packets received from the plurality of software ports to the packet processing engine at a transfer rate that is at least equal to the aggregate software port ingress rate and that is less than a communication rate of the packet processing engine.

A communication device comprising:

• an ingress direct memory access (DMA) unit operable to transfer one or more packets to a packet processing engine of the communication device;
• a processor coupled with the ingress DMA unit, the processor operable to:
• determine a communication rate associated with each of a plurality of software ports of the communication device for providing packets to the packet processing engine;
• determine an aggregate software port ingress rate of the communication device based on a sum of the communication rate associated with each of the plurality of software ports of the communication device;
• and
• limit a transfer rate associated with the ingress DMA unit to the aggregate software port ingress rate in providing the packets to the packet processing engine;
• and
• the packet processing engine coupled with the ingress DMA unit, the packet processing engine operable to process one or more packets received by at least the plurality of software ports, wherein the ingress DMA unit couples the plurality of software ports and the packet processing engine.

One or more machine-readable storage media having instructions stored therein, which when executed by one or more processors causes the one or more processors to perform operations that comprise:

• determining a communication rate associated with each of a plurality of software ports of a communication device for providing packets to a packet processing engine via an ingress direct memory access (DMA) unit of the communication device;
• determining an aggregate software port ingress rate of the communication device based on a sum of the communication rate associated with each of the plurality of software ports of the communication device;
• and
• limiting a transfer rate associated with the ingress DMA unit to the aggregate software port ingress rate in providing the packets to the packet processing engine.