Measuring dielectric breakdown in a dynamic mode

A computer system for testing a semiconductor device to measure dielectric breakdown, the computer system comprising:

• one or more processors, one or more computer-readable memories, one or more computer-readable storage devices, and program instructions stored on at least one of the one or more storage devices for execution by at least one of the one or more processors via at least one of the one or more memories, the program instructions comprising:
• program instructions to apply a plurality of stress voltages to a semiconductor device under test;
• program instructions to determine a plurality of current measurements until a failure criteria occurs, using a predefined voltage ramp rate and a predefined plurality of stress voltage steps, wherein the number of the plurality of current measurements is less than or equal to the number of the predefined plurality of voltage steps;
• program instructions to identify a stress voltage at which the semiconductor device fails;
• and
• program instructions to calculate a frequency dependent voltage acceleration factor based on the quotient of the natural log of the voltage at which the semiconductor device under test failed to the natural log of the predetermined voltage ramp rate.

A computer program product for testing a semiconductor device to measure dielectric breakdown, the computer program product comprising:

• one or more computer-readable storage media and program instructions stored on the one or more computer-readable storage media, the program instructions comprising:
• program instructions to apply a plurality of stress voltages to a semiconductor device under test;
• program instructions to determine a plurality of current measurements until a failure criteria occurs, using a predefined voltage ramp rate and a predefined plurality of stress voltage steps, wherein the number of the plurality of current measurements is less than or equal to the number of the predefined plurality of voltage steps;
• program instructions to identify a stress voltage at which the semiconductor device fails;
• and
• program instructions to calculate a frequency dependent voltage acceleration factor based on the quotient of the natural log of the voltage at which the semiconductor device under test failed to the natural log of the predetermined voltage ramp rate.