Multi-patterning method and device formed by the method
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChia-Ying LEE, Jyu-Horng SHIEH
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChia-Ying LEE, Jyu-Horng SHIEH
Estimating the term…
A multi-patterning method includes: patterning at least two first openings in a hard mask layer over a substrate using a first mask; forming spacers within two of the at least two first openings, each spacer having a spacer opening therein for patterning a respective first circuit pattern over the substrate, wherein each spacer defines a pattern-free region adjacent to a respective one of the at least two first circuit patterns, and patterning a second circuit pattern in the hard mask layer using a second mask. The second circuit pattern is located between and excluded from the pattern free regions adjacent the at least two first circuit patterns.
A multi-patterning method comprising:
A multi-patterning method comprising:
A method, comprising:
Dependencies are inferred from the claim text.