Systems and methods for transporting a clock signal over a network

A system comprising:

• a packet monitoring module configured to detect receipt of a synchronization packet from a master device;
• a clock module configured to provide a slave clock signal having a slave clock frequency;
• a counter module configured to increment or decrement a counter value based on the slave clock signal;
• a clock frequency estimation module configured to, in response to the packet monitoring module detecting receipt of the synchronization packet from the master device, obtain a current counter value from the counter module and to determine an estimated clock frequency of the master device based on the current counter value;
• and
• a frequency offset calculation module configured to calculate a frequency offset for the slave clock frequency based on the estimated clock frequency of the master device.

A method comprising:

• monitoring a counter value of a counter at a master device, the counter being driven by a master clock signal having a master clock frequency;
• generating a synchronization packet in response to the counter value satisfying a condition;
• and
• transmitting the synchronization packet from the master device to a slave device in response to satisfaction of the condition.

A method comprising:

• detecting receipt of a synchronization packet from a master device at a slave device;
• in response to the detecting the receipt of the synchronization packet at the slave device, obtaining a current counter value of a counter at the slave device, the counter being driven by a slave clock signal having a slave clock frequency;
• generating an estimated clock frequency for the master device based on the current counter value;
• and
• calculating a frequency offset based on the slave clock frequency and the estimated clock frequency of the master device.

A system comprising:

• means for monitoring a counter value of a counter at a master device, the counter being driven by a master clock signal having a master clock frequency;
• means for generating a synchronization packet in response to the counter value satisfying a condition;
• and
• means for transmitting the synchronization packet from the master device to a slave device.

A system comprising:

• means for detecting receipt of a synchronization packet from a master device at a slave device;
• means for obtaining a current counter value of a counter at the slave device in response to the detecting the receipt of the synchronization packet at the slave device, the counter being driven by a slave clock signal having a slave clock frequency;
• means for generating an estimated clock frequency of the master device based on the current counter value;
• and
• means for calculating a frequency offset based on the slave clock frequency and the estimated clock frequency of the master device.