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US 2014/0192580 A1Published application
Low power content addressable memory system
AssigneeIntel Corporation
InventorKhader Mohammad
Life of this patent
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AssigneeIntel Corporation
InventorKhader Mohammad
Estimating the term…
A content addressable memory (CAM) system includes one or more CAM cells, each including a bit cell to store a bit and a complementary bit, and a compare circuit to compare a reference input to the stored bit and to the stored complementary bit. The compare circuit may be implemented to compare a single-ended reference input to each of the stored bit and the complementary bit. The compare circuit may include a pass circuit to selectively provide the reference input to an output under control of the stored bit and the stored complementary bit, a pull-up circuit to selectively pull-up the output under control of the reference input and the stored complementary bit, and a pull-down circuit to selectively pull-down the output under control of the reference input and the stored bit. The reference input may be provided to multiple CAM cells, which may share compare circuitry.
1-12. (canceled)
An apparatus, comprising a first content addressable memory (CAM) cell that includes a first compare circuit implemented to receive a reference bit and operate under control of the reference bit, and a stored bit and a corresponding stored complementary bit stored in the CAM cell, to selectively:
An apparatus, comprising a first content addressable memory (CAM) cell that includes a first compare circuit, the compare circuit including:
Dependencies are inferred from the claim text.