Reducing impedance of a printed circuit board through a square wave pattern of plated-through holes
AssigneeNVIDIA Corporation
InventorShuang Xu
Life of this patent
Estimating the term…
Loading patent…
AssigneeNVIDIA Corporation
InventorShuang Xu
Estimating the term…
Disclosed are a method and system to reduce impedance of printed circuit boards through an interconnecting of printed circuit boards using a square wave pattern of plated-through holes. A method of connecting a first printed circuit board to a second printed circuit board comprises forming a square wave pattern of the first printed circuit board and the second printed circuit board and adjoining the first printed circuit board and the second printed circuit board. The method also involves producing plated-through holes along the square wave pattern, a top section, and/or a bottom section of the adjoined first printed circuit board and second printed circuit board. The method further involves securing the top section and the bottom section using a first metal clip and a second metal clip, respectively, and connecting the first printed circuit board to the second printed circuit board by a wave soldering process.
A method of connecting a first printed circuit board to a second printed circuit board, comprising:
A connected first printed circuit board and second printed circuit board comprising:
A method for decreasing an impedance of a printed circuit board, comprising:
Dependencies are inferred from the claim text.