Apparatus and method for memory-hierarchy aware producer-consumer instruction

An instruction processing apparatus comprising:

• at least one core and a cache accessible by both the core and a GPU;
• CPU-GPU producer-consumer logic configured to perform the operations of:
• writing data to a buffer within the core of the CPU until a designated amount of data has been written;
• upon detecting that the designated amount of data has been written, responsively generating an eviction cycle, the eviction cycle causing the data to be transferred from the buffer to a cache accessible by both the core and the GPU;
• and
• setting an indication to indicate to the GPU that data is available in the cache;
• wherein upon the GPU detecting the indication, the data is provided to the GPU from the cache upon receipt of a read signal from the GPU.

A computer system comprising:

• a graphics processor unit (GPU) for processing a set of graphics instructions to render video;
• and
• a central processing unit comprising:
• at least one core and a cache accessible by both the core and the GPU;
• CPU-GPU producer-consumer logic configured to perform the operations of:
• writing data to a buffer within the core of the CPU until a designated amount of data has been written;
• upon detecting that the designated amount of data has been written, responsively generating an eviction cycle, the eviction cycle causing the data to be transferred from the buffer to a cache accessible by both the core and the GPU;
• and
• setting an indication to indicate to the GPU that data is available in the cache;
• wherein upon the GPU detecting the indication, the data is provided to the GPU from the cache upon receipt of a read signal from the GPU.