Integrated circuit with calibrated pulling effect correction

A calibration circuit for calibrating a reduction in interference from a pulling signal having one or more unwanted frequency components, comprising:

• a combinational gate coupled to an output of a voltage-controlled oscillator (VCO), the combinational gate configured to receive a VCO output signal and a selected reference signal to detect a phase difference between the VCO output signal and the selected reference signal and generate an output binary signal, wherein the VCO output signal comprises the one or more unwanted frequency components of the pulling signal;
• a loop filter coupled to an output of the VCO, the loop filter configured to filter the output binary signal and generate a filtered calibration signal;
• an analog-to-digital converter coupled to an output of the loop filter, the analog-to-digital converter configured to convert the filtered calibration signal from the analog domain to the digital domain and generate a converted calibration signal;
• and
• a processor coupled to an output of the analog-to-digital converter, the processor configured to compute the converted calibration signal and determine components of a baseband signal that corrects for the one or more unwanted frequency components of the VCO output signal.