Backlight Dimmer Circuit and Backlight Dimming Method

A backlight dimmer circuit, comprising:

• a PLL (Phase-Locked Loop) dimming module, which detects a rising edge of a 3-dimensional (3D) synchronous signal in order to generate multiple channels of 3D mode dimming signal that are in phase with the 3D synchronous signal, the PLL dimming module further determining duty ratio of 3D mode according to analog dimming DC duty;
• a phase delay module, which receives the multiple channels of 3D mode dimming signal from the PLL dimming module and generates time-divided outputs of the multiple channels of 3D mode dimming signal in a channel by channel manner according to a delay set value;
• an external dimming module, which receives an external dimming signal to generate a 2-Dimensional (2D) mode dimming signal;
• and
• a trigger, which receives the 2D mode dimming signal and the multiple channels of 3D mode dimming signal that is output in a time-divided and channel by channel manner and determines whether to output the 2D mode dimming signal or the multiple channels of 3D mode dimming signal that is output in a channel by channel manner according to a 2D/3D conversion signal;
• wherein the PLL dimming module is an analog PLL or a digital PLL;
• wherein the analog PLL generally comprises a phase reference extraction circuit, a voltage controlled oscillator, a phase comparator, and a control circuit, the analog PLL extracting the 3D synchronous signal as a phase reference signal, the voltage controlled oscillator comprising a triangular wave generation circuit, which is compared with analog dimming level to generate a square wave;
• wherein the phase delay module comprises an adjustor counter, whereby when counting of the counter reaches a preset value, a transmission channel of the corresponding channel is opened;
• wherein the phase delay module is connected to a capacitor and the delay value is determined by the value of the capacitor;
• wherein the external dimming module comprises an operational amplifier;
• wherein the 2D/3D conversion signal comprises high and low level signals;
• and
• wherein the PLL dimming module is integrated in an LED driving chip.

A backlight dimming method, comprising:

• (1) using a PLL dimming module to detect a rising edge of a 3-dimensional (3D) synchronous signal in order to generate multiple channels of 3D mode dimming signal that are in phase with the 3D synchronous signal, the PLL dimming module further determining duty ratio of 3D mode according to analog dimming DC duty;
• (2) using a phase delay module to receive the multiple channels of 3D mode dimming signal from the PLL dimming module and generate time-divided outputs of the multiple channels of 3D mode dimming signal in a channel by channel manner according to a delay set value;
• (3) using an external dimming module to receive an external dimming signal in order to generate a 2-dimensional (2D) dimming signal;
• and
• (4) using a trigger to receive the 2D mode dimming signal and the multiple channels of 3D mode dimming signal that is output in a time-divided and channel by channel manner and determine whether to output the 2D mode dimming signal or the multiple channels of 3D mode dimming signal that is output in a time-divided and channel by channel manner according to a 2D/3D conversion signal.