Multi-die semiconductor package and method of manufacturing thereof

Abstract

A multi-die semiconductor package and various methods of manufacturing the same. In one embodiment, the semiconductor package includes: (1) a substrate, (2) a first die coupled to the substrate, the first die having a first set of terminals located along a first edge and bearing a first integrated circuit (IC) that substantially occupies an area of the first die, (3) a second die coupled to the substrate, the second die having a second set of terminals and bearing a second IC that substantially occupies an area of the second die, the first and second ICS being mirror-images of one another and (4) interconnects coupling corresponding terminals of the first and second sets together.

Dependencies are inferred from the claim text.