Bumps for Chip Scale Packaging
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChun-Hung Lin, Yu-Feng Chen, Tsung-Shu Lin, Han-Ping Pu, Hsien-Wei Chen
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChun-Hung Lin, Yu-Feng Chen, Tsung-Shu Lin, Han-Ping Pu, Hsien-Wei Chen
Estimating the term…
A chip scale semiconductor device comprises a semiconductor die, a first bump and a second bump. The first bump having a first diameter and a first height is formed on an outer region of the semiconductor die. A second bump having a second diameter and a second height is formed on an inner region of the semiconductor die. The second diameter is greater than the first diameter while the second height is the same as the first height. By changing the shape of the bump, the stress and strain can be redistributed through the bump. As a result, the thermal cycling reliability of the chip scale semiconductor device is improved.
A device comprising:
A device comprising:
A structure comprising:
Dependencies are inferred from the claim text.