Elongated bump structures in package structure

A package structure, comprising:

• a chip comprising a bump structure, wherein the bump structure comprises a conductive pillar having a length (L) measured along a long axis of the conductive pillar and a width (W) measured along a short axis of the conductive pillar;
• and
• a substrate comprising a mask layer overlying the substrate and having an opening, and a conductive region filling the opening of the mask layer and protruding from the top surface of the mask layer;
• wherein the chip is attached to the substrate to form an interconnection between the conductive pillar and the conductive region,
• wherein the opening has a first dimension (d1) measured along the long axis and a second dimension (d2) measured along the short axis;
• and
• wherein L is greater than d1, and W is less than d2.

A method of forming a package structure, comprising:

• forming a bump structure on a semiconductor substrate, wherein the bump structure comprises a conductive pillar having a length (L) measured along a long axis of the conductive pillar and a width (W) measured along a short axis of the conductive pillar;
• forming a solder resist layer on a package substrate which having a pad region,
• forming an opening in the solder resist layer, wherein the opening has a first dimension (d1) measured along the long axis and a second dimension (d2) measured along the short axis, and wherein L is greater than d1, and W is less than d2;
• and
• attaching a chip to the package substrate to form an interconnection between the conductive pillar and the pad region.