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US 2014/0191387 A1Published application
Method of fabricating land grid array semiconductor package
AssigneesSTMicroelectronics (Grenoble 2) SAS, Stmicroelectronics Pte Ltd
InventorsYonggang JIN, Romain COFFY, Jerome TEYSSEYRE
Life of this patent
Estimating the term…
Abstract
A fan-out wafer level package is provided with a semiconductor die embedded in a reconstituted wafer. A redistribution layer is positioned over the semiconductor die, and includes a land grid array on a face of the package. A copper heat spreader is formed in the redistribution layer over the die in a same layer as a plurality of electrical traces configured to couple circuit pads of the semiconductor die to respective contact lands of the land grid array. In operation, the heat spreader improves efficiency of heat transfer from the die to the circuit board.
Claims20
A semiconductor package, comprising:
- a portion of a reconstituted wafer, including a molding compound layer and a semiconductor die having a plurality of circuit pads positioned on a face of the semiconductor die, the semiconductor die being substantially embedded in the molding compound layer with the face of the semiconductor die lying coplanar with a face of the molding compound layer;
- and
- a redistribution layer positioned on the face of the portion of the reconstituted wafer and having:
- a plurality of electrical traces in electrical contact with respective ones of the plurality of circuit pads,
- a plurality of contact lands defined on a face of the wafer portion, each electrically coupled to a respective one of the plurality of circuit pads via a corresponding one of the plurality of electrical traces, and
- a heat spreader positioned over the semiconductor die and lying in a same layer of the redistribution layer as the plurality of electrical traces, the heat spreader being electrically isolated from the semiconductor die and substantially covering a majority of the face of the semiconductor die.
3 more elements
A device, comprising:
- a first insulation layer;
- a first metal layer over the first insulation layer, the first metal layer including:
- a first electrical trace and a second electrical trace, the first electrical trace having a first end and a second end, the second electrical trace having a first end and a second end, the first and second electrical traces penetrating the first insulation layer at the first ends of the first and second electrical traces respectively, a first distance between the first ends of the first and second electrical traces being smaller than a second distance between the second ends of the first and second electrical traces;
- and
- a heat spreader positioned between and electrically isolated from the first electrical trace and the second electrical trace;
- a second insulation layer over the metal layer, the second insulation layer having an opening that exposes the heat spreader;
- and
- a second metal layer over the second insulation layer, the second metal layer including a first contact land and a second contract land, the first contact land being coupled to the second end of the first electrical trace, and the second contact land being coupled to the second end of the second electrical trace.
5 more elements
A circuit, comprising:
- a semiconductor die, the semiconductor die having a first surface and a plurality of contact pads on the first surface, the plurality of contact pads covering less than a majority of the first surface, the first surface having a first length and a first width;
- and
- a molding compound encapsulating the semiconductor die on sides of the semiconductor die and a surface opposite the first surface;
- and
- a redistribution level, the redistribution level directly on the first surface and coupled to the semiconductor die, the redistribution level having a second surface, the second surface having a second length and a second width in which the second length is greater than the first length and the second width is greater than the first width, the redistribution level including a heat sink overlying a majority of the first surface, the heat sink not overlying the plurality of contact pads on the first surface.
2 more elements
Dependencies are inferred from the claim text.