Circuit substrate, method of manufacturing circuit substrate, and electronic component
AssigneeSony Corporation
InventorHiroshi Asami
Life of this patent
Estimating the term…
Abstract
A circuit substrate includes: a mounting region having an exposed surface that is planarized, and in which a predetermined chip is to be mounted; patterns provided in the mounting region, and including respective top faces that form a part of the exposed surface; and solder bumps provided on the respective patterns, and having substantially same shape as one another.
Claims7
A circuit substrate, comprising:
- a mounting region having an exposed surface that is planarized, and in which a predetermined chip is to be mounted;
- patterns provided in the mounting region, and including respective top faces that form a part of the exposed surface;
- and
- solder bumps provided on the respective patterns, and having substantially same shape as one another.
A method of manufacturing a circuit substrate, the method comprising:
- planarizing a surface of a mounting region in which a predetermined chip is to be mounted to expose top faces of respective patterns in the mounting region;
- covering the mounting region with a resist;
- forming openings on respective portions, of the resist, that cover the respective patterns, the openings having same shape as one another;
- filling solder particles into the openings, the solder particles each having a diameter that is smaller than a diameter of each of the openings;
- melting the solder particles to form the solder bumps in the openings;
- and
- removing the resist.
An electronic component provided with a chip and a circuit substrate, the chip being provided with terminals, and the circuit substrate being mounted with the chip, the circuit substrate comprising:
- a mounting region having an exposed surface that is planarized, and in which a predetermined chip is mounted;
- patterns provided in the mounting region, and including respective top faces that form a part of the exposed surface;
- and
- solder bumps provided on locations, on the respective patterns, that correspond to the respective terminals of the chip, and having substantially same shape as one another.
Dependencies are inferred from the claim text.