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AssigneeInternational Business Machines Corporation
InventorsKangguo Cheng, Thomas N. Adam, Ali Khakifirooz, Alexander Reznicek
Estimating the term…
An improved finFET and method of fabrication is disclosed. Embodiments of the present invention take advantage of the different epitaxial growth rates of {110} and {100} silicon. Fins are formed that have {110} silicon on the fin tops and {100} silicon on the long fin sides (sidewalls). The lateral epitaxial growth rate is faster than the vertical epitaxial growth rate. The resulting merged fins have a reduced merged region in the vertical dimension, which reduces parasitic capacitance. Other fins are formed with {110} silicon on the fin tops and also {110} silicon on the long fin sides. These fins have a slower epitaxial growth rate than the {100} side fins, and remain unmerged in a semiconductor integrated circuit, such as an SRAM circuit.
A semiconductor structure comprising:
An integrated circuit comprising:
A method of fabricating a semiconductor structure comprising forming a first set of fins on a {110} wafer, each fin of the first set of fins having a top surface and two sidewalls, wherein each fin of the first set of fins is oriented with its top oriented parallel to a {110} plane and its sidewalls parallel to a {100} plane, and forming a second set of fins on the {110} wafer, each fin of the second set of fins having two sidewalls, wherein each fin of the second set of fins is oriented with its top oriented parallel to a {110} plane and its sidewalls not oriented to a {100} plane.
Dependencies are inferred from the claim text.