Multigate metal oxide semiconductor devices and fabrication methods
AssigneeBroadcom Corporation
InventorAkira Ito
Life of this patent
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Abstract
A semiconductor device includes a first well and a second well implanted in a semiconductor substrate. The semiconductor device further includes a gate structure above the first and second wells between a raised source structure and a raised drain structure. The raised source structure above is in contact with the first well and connected with the gate structure through a first semiconductor fin structure. The raised drain structure above and in contact with the second well and connected with a second semiconductor fin structure. The second semiconductor fin structure includes at least a gap and a lightly doped portion.
Claims20
A semiconductor device, comprising:
- a first well implanted in a semiconductor substrate;
- a second well implanted in the semiconductor substrate;
- a gate structure above the first and second wells;
- a raised source structure above and in contact with the first well and connected with the gate structure through a first semiconductor fin structure;
- and
- a raised drain structure above and in contact with the second well and connected with a second semiconductor fin structure,
- wherein the second semiconductor fin structure comprises a gap separating the gate structure from the raised drain structure.
A semiconductor device, comprising:
- a first well having a first well upper surface;
- a second well having a second well upper surface;
- a gate structure disposed on the first well upper surface and the second well upper surface;
- a raised source structure disposed above and in contact with the first well having a source upper surface higher in at least one location than the first well upper surface and connected with the gate structure through a first semiconductor fin structure;
- and
- a raised drain structure disposed on the second well and connected with the gate structure through a second semiconductor fin structure, wherein the second semiconductor fin structure is doped relatively lighter than the first semiconductor fin structure.
A method for fabricating a semiconductor device, comprising:
- implanting a first well into a semiconductor substrate;
- implanting a second well into the semiconductor substrate;
- fabricating a first semiconductor fin structure and a second semiconductor fin structure;
- fabricating a gate structure partially on the first well and partially on the second well;
- fabricating a raised source structure above and in contact with the first well and;
- fabricating a raised drain structure above and in contact with the second well and;
- wherein:
- the first semiconductor fin structure connects the gate structure and the raised source structure;
- the second semiconductor fin structure is disposed between the gate structure and the raised drain structure;
- and
- the second semiconductor fin structure comprise at least one of the following:
- a gap separating the gate structure from the raised drain structure;
- and
- a lightly doped region that is doped relatively lighter than the first semiconductor fin structure.
Dependencies are inferred from the claim text.