Thin film transistor array panel

A thin film transistor array panel comprising:

• a substrate;
• a gate line elongated in a first direction and comprising a first gate electrode and a second gate electrode and disposed on the substrate;
• a gate insulating layer on the first gate electrode and the second gate electrode;
• a semiconductor on the gate insulating layer;
• and
• a source electrode and a first drain electrode and a second drain electrode connected to each other disposed on the semiconductor,
• wherein
• the first drain electrode faces the source electrode with respect to the first gate electrode, and the second drain electrode is disposed adjacent to the second gate electrode,
• the drain electrode comprises a plurality of first regions each having a predetermined width in the first direction, and the second drain electrode comprises a plurality of second regions each having a predetermined width in the first direction,
• at least one of the plurality of second regions comprises an edge which forms an angle from about 0 degrees to about 90 degrees with the first direction, and
• a planar area of at least one of the plurality of second regions is different from each planar area of remaining second regions of the plurality of second regions.