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US 2014/0190543 A1Published application
Wafer scale thermoelectric energy harvester
AssigneeAnalog Devices, Inc.
InventorBaoxing CHEN
Life of this patent
Estimating the term…
Abstract
An integrated circuit may include a substrate and a dielectric layer formed over the substrate. A plurality of p-type thermoelectric elements and a plurality of n-type thermoelectric elements may be disposed within the dielectric layer. The p-type thermoelectric elements and the n-type thermoelectric elements may be connected in series while alternating between the p-type and the n-type thermoelectric elements.
Claims20
An integrated circuit, comprising:
- a substrate;
- a dielectric layer formed over the substrate;
- a plurality of p-type thermoelectric elements disposed within the dielectric layer;
- and
- a plurality of n-type thermoelectric elements disposed within the dielectric layer, wherein the p-type thermoelectric elements and the n-type thermoelectric elements are connected in series while alternating between the p-type and the n-type thermoelectric elements.
2 more elements
An integrated circuit, comprising:
- a substrate;
- a plurality of p-type and n-type thermoelectric elements disposed above the substrate and connected in series while alternating between the p-type and the n-type thermoelectric elements;
- and
- a cap above the substrate to enclose the thermoelectric elements between the cap and the substrate.
1 more element
A thermoelectric energy harvester, comprising:
- a substrate;
- an array of thermoelectric couples disposed above the substrate and connected in series via interconnects, each thermoelectric couple including a first element of a p-type material and a second element of an n-type material, the first element and the second element coupled via the interconnect at one end;
- and
- a dielectric provided between the first elements and the second elements to electrically isolate the first and the first elements and the second elements.
1 more element
Dependencies are inferred from the claim text.