US 2014/0175446 A1 · ARRAY SUBSTRATE, METHOD FOR MANUFACTURING THE SAME, AND DISPLAY DEVICE

Abstract

An array substrate includes a GOA circuit area and a display area, the GOA circuit area includes a TFT area and a lead-wire area, the display area includes a data line and a gate line. The GOA circuit area is provided with at least one first via and at least one second via, a data-line metal layer is disposed at the bottom of the at least one first via, and a gate-line metal layer is disposed at the bottom of the at least one second via. The GOA circuit area further includes a first electrode and a second electrode, the data-line metal layer is electrically connected to one electrode through the at least one first via, the gate-line metal layer is electrically connected to the other electrode through the at least one second via, such that a capacitor is formed between the first electrode and the second electrode.

Claims20

Dependent claims

An array substrate including a GOA circuit area which includes a TFT area for outputting a gate row-driving signal and a lead-wire area connected to the TFT area, and a display area which includes a data line and a gate line which are arranged crosswise;

wherein
the GOA circuit area is provided with at least one first via and at least one second via, a data-line metal layer is disposed at the bottom of the at least one first via, and a gate-line metal layer is disposed at the bottom of the at least one second via;
the GOA circuit area further includes a first electrode and a second electrode, the data-line metal layer is electrically connected to one electrode of the first electrode and the second electrode through the at least one first via, the gate-line metal layer is electrically connected to the other electrode of the first electrode and the second electrode through the at least one second via, such that a capacitor is formed between the first electrode and the second electrode.

A display device including an array substrate, the array substrate includes a GOA circuit area which includes a TFT area for outputting a gate row-driving signal and a lead-wire area connected to the TFT area, and a display area which includes a data line and a gate line which are arranged crosswise;

wherein
the GOA circuit area is provided with at least one first via and at least one second via, a data-line metal layer is disposed at the bottom of the at least one first via, and a gate-line metal layer is disposed at the bottom of the at least one second via;
the GOA circuit area further includes a first electrode and a second electrode, the data-line metal layer is electrically connected to one electrode of the first electrode and the second electrode through the at least one first via, the gate-line metal layer is electrically connected to the other electrode of the first electrode and the second electrode through the at least one second via, such that a capacitor is formed between the first electrode and the second electrode.

A method for manufacturing an array substrate, the array substrate includes a GOA circuit area which includes a TFT area for outputting a gate row-driving signal and a lead-wire area connected to the TFT area, and a display area which includes a data line and a gate line which are arranged crosswise;

wherein the GOA circuit area further includes a first electrode and a second electrode, the method including:
forming a resin layer having a first via on a substrate on which the TFT area is formed such that the first via penetrates through the resin layer to expose a data-line metal layer of the TFT area;
forming a first electrode on the surface of the resin layer such that the first electrode is electrically connected to the data-line metal layer through the first via;
forming a passivation layer having a second via on the substrate on which the first electrode is formed such that the second via penetrates through the passivation layer, the resin layer, and a gate-insulating layer of the TFT area to expose a gate-line metal layer of the TFT area;
and
forming a second electrode on the surface of the passivation layer such that the second electrode is electrically connected to the gate-line metal layer through the second via, to form a capacitor between the first electrode and the second electrode.

3 more elements

Dependencies are inferred from the claim text.

Array substrate, method for manufacturing the same, and display device

Life of this patent

Array substrate, method for manufacturing the same, and display device

Life of this patent

Abstract

Claims20