Multi-processor systems and booting methods thereof

A processing device, comprising:

• a processor and an interface buffer, the processor configured to connect to a system bus of a multi-processor system and to activate the interface buffer, the interface buffer configured to connect to a local bus to receive a first boot code upon receipt of an activating signal from the processor, wherein the processor is further configured to activate the interface buffer to access a second boot code via the local bus upon receipt of an instruction from a processor of another processing device and to transfer the second boot code to the second processing device via the system bus.

A multi-processor system, comprising:

• A first intellectual property (IP) block including a first processor and a second IP block including a second processor, each of the first processor or the second processor configured to connect to a system bus to receive a corresponding first boot code or a corresponding second boot code upon issuing an instruction configured to retrieve the first boot code or the second boot code from a shared boot memory.