Enabling and disabling a second jump execution unit for branch misprediction
OwnerMark J. Dechene, Matthew C. Merten +1inventors
InventorsMark J. Dechene, Matthew C. Merten, Sean P. Mirkes
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OwnerMark J. Dechene, Matthew C. Merten +1inventors
InventorsMark J. Dechene, Matthew C. Merten, Sean P. Mirkes
Estimating the term…
Techniques are described for enabling and/or disabling a secondary jump execution unit (JEU) in a micro-processor. The secondary JEU is incorporated in the micro-processor to operate concurrently with a primary JEU, and to enable the handling of simultaneous branch mispredicts on multiple branches. Activation and deactivation of the secondary JEU may be controlled by a pressure counter or a confidence counter. A pressure counter mechanism increments a count for each branch operation executed within the processor and decrements the count by a decay value during each cycle. A confidence counter mechanism increments a count for each correctly predicted branch, and decrements the count for each mispredict. Each counter signals an activation component, such as a port binding hardware component, to begin binding micro-operations to the secondary JEU when the counter exceeds an activation threshold. The counter mechanism may be thread-agnostic or thread-specific.
A processor comprising:
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A method comprising:
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A system comprising:
Dependencies are inferred from the claim text.