State encoding for cache lines
AssigneeAdvanced Micro Devices, Inc.
InventorRobert Krick
Life of this patent
Estimating the term…
Abstract
A method and apparatus for state encoding of cache lines is described. Some embodiments of the method and apparatus support probing, in response to a first probe of a cache line in a first cache, a copy of the cache line in a second cache when the cache line is stale and the cache line is associated with a copy of the cache line stored in the second cache that can bypass notification of the first cache in response to modifying the copy of the cache line.
Claims20
A method, comprising:
- in response to a first probe of a cache line in a first cache, probing a copy of the cache line in a second cache when the cache line is stale and the cache line is associated with a copy of the cache line stored in the second cache that can bypass notification of the first cache in response to modifying the copy of the cache line.
An apparatus, comprising:
- a first cache configurable to probe, in response to a first probe of a cache line in a first cache, a copy of the cache line in a second cache when the cache line is stale and the cache line is associated with a copy of the cache line stored in the second cache that can bypass notification of the first cache in response to modifying the copy of the cache line.
A computer readable media including instructions that when executed can configure a manufacturing process used to manufacture a semiconductor device comprising:
- a first cache configurable to probe, in response to a first probe of a cache line in a first cache, a copy of the cache line in a second cache when the cache line is stale and the cache line is associated with a copy of the cache line stored in the second cache that can bypass notification of the first cache in response to modifying the copy of the cache line.
Dependencies are inferred from the claim text.