System and Method for Intelligent Platform Management Interface Keyboard Controller Style Interface Multiplexing
AssigneeDell Products L.P.
InventorsWade A. Butcher, Richard L. Holmberg
Life of this patent
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Abstract
An information handling system includes a processing node, an input/output (I/O) module coupled to the processing node via a high bandwidth interface, and a service processor coupled to the I/O module via a multi-master interface. A transaction between the processing node and the service processor that is targeted to a low pin count (LPC) bus is executed between the processing node and the service processor via the high bandwidth interface and the multi-master interface.
Claims20
An information handling system comprising:
- a first processing node;
- a first input/output (I/O) module coupled to the first processing node via a first high bandwidth interface;
- and
- a service processor coupled to the first I/O module via a multi-master interface;
- wherein a first transaction between the first processing node and the service processor that is targeted to a low pin count (LPC) bus is executed between the first processing node and the service processor via the first high bandwidth interface and the multi-master interface.
A method comprising:
- receiving, at a first processing node, a first transaction between the first processing node and a service processor that is targeted to a low pin count (LPC) bus;
- sending the first transaction to the service processor via a first high bandwidth interface between the first processing node and a first input/output (I/O) module, and via a multi-master interface between the first I/O module and the service processor.
A non-transitory computer-readable medium including code for carrying out a method, the method comprising:
- receiving, at a first processing node, a first transaction between the first processing node and a service processor that is targeted to a low pin count (LPC) bus;
- sending the first transaction to the service processor via a first high bandwidth interface between the first processing node and a first input/output (I/O) module, and via a multi-master interface between the first I/O module and the service processor.
Dependencies are inferred from the claim text.