Control plane protection for various tables using storm prevention entries

A network device having a symmetric multiprocessing architecture, the network device comprising:

• a plurality of CPU cores;
• a network interface to receive one or more data packets;
• and
• a memory whose access is shared by the dedicated CPU core and the plurality of CPU cores;
• wherein the plurality of CPU cores are to:
• receive a first packet;
• create an inactive entry based on a source Internet Protocol (IP) address associated with the first packet;
• forward the first packet to a second processor for processing;
• and
• discard a second packet associated with the source IP address in response to detection of the inactive entry when the second packet is received.

A non-transitory computer-readable storage medium storing embedded instructions for a plurality of operations that are executed by one or more mechanisms implemented within a network device having a symmetric multiprocessing architecture, the plurality of operations comprising:

• receiving a first packet;
• creating an inactive entry based on a source Internet Protocol (IP) address associated with the first packet;
• forwarding the first packet from a first processor to a second processor for processing;
• associating the inactive entry with a timestamp indicating when the first packet is forwarded to the second processor;
• determining a configured interval (CI) associated with a table in which the inactive entry is created;
• comparing a difference between a current timestamp and the timestamp associated with the inactive entry against the CI in response to receiving a second packet associated with the source IP address;
• in response to the difference being longer than the CI,
• associating the inactive entry with the current timestamp;
• and
• forwarding the second packet to the first processor for processing;
• and
• in response to the difference being no longer than the CI,
• discarding the second packet.