US 2014/0154881 A1 · METHOD OF MANUFACTURING METAL SILICIDE AND SEMICONDUCTOR STRUCTURE USING THE SAME

Abstract

A method of manufacturing a metal silicide is disclosed below. A substrate having a first region and a second region is provided. A silicon layer is formed on the substrate. A planarization process is performed to make the silicon layer having a planar surface. A part of the silicon layer is removed to form a plurality of first gates on the first region and to form a plurality of second gates on the second region. The height of the first gates is greater than the height of the second gates, and top surfaces of the first gates and the second gates have the same height level. A dielectric layer covering the first gates and the second gates is formed and exposes the top surfaces of the first gates and the second gates. A metal silicide is formed on the top surfaces of the first gates and the second gates.

Claims10

Dependent claims

A method of manufacturing a semiconductor device, comprising:

providing a substrate, the substrate has a first region and a second region;
forming a silicon layer on the substrate;
performing a planarization process to make the silicon layer having a planar surface;
removing a part of the silicon layer to form a plurality of first gates on the first region and to form a plurality of second gates on the second region, the height of the first gates is greater than that of the second gates, and top surfaces of the first gates and the second gates have the same height level;
forming a dielectric layer on the substrate, the dielectric layer covers the first gates and the second gates and exposes the top surfaces of the first gates and the second gates;
and
forming a metal silicide on the top surfaces of the first gates and the second gates.

4 more elements

Dependencies are inferred from the claim text.

Facts

Application

14/174,931Filed 7 Feb 2014

Priority

7 Mar 2012

Published

5 Jun 2014

Term ends

Not estimatedThe source records don’t support an estimate.

Classification10 codes

H10P 14/40
Formation of materials, e.g. in the shape of layers or pillars: of conductive or resistive materials
H10B 99/22
Subject matter not provided for in other groups of this subclass: including field-effect components
H10D 64/0131
The conductor further comprising a non-elemental silicon additional conductive layer, e.g. a metal silicide layer formed by the reaction of…: the…
H10D 64/01326
Characterised by the conductor: aspects related to lithography, isolation or planarisation of the conductor

Method of manufacturing metal silicide and semiconductor structure using the same

Life of this patent

Method of manufacturing metal silicide and semiconductor structure using the same

Life of this patent

Abstract

Claims10