Shallow trench isolation structures

A method of forming a semiconductor device, comprising:

• forming a high-k gate dielectric layer on a semiconductor substrate comprising a first silicon layer, a second silicon layer, and a buried oxide layer disposed between the first silicon layer and the second silicon layer;
• and
• forming a shallow trench isolation structure formed in the semiconductor substrate, wherein forming a shallow trench isolation structure comprises:
• forming a shallow trench in the substrate through the first silicon layer, the buried oxide layer and partially through the second silicon layer;
• forming a first liner conformally lining the shallow trench;
• and
• filling the shallow trench with a trench fill material,
• wherein the first liner is formed of a material having etch selectivity with regard to the trench fill material, and wherein the first liner is formed to serve as a protective liner to prevent electrical shorts from forming between the first and second silicon layer in the shallow trench.