Method of manufacturing chip-stacked semiconductor package

A method of manufacturing a chip-stacked semiconductor package, the method comprising:

• providing a base wafer including a plurality of first chips each having a through-silicon via (TSV) and a first connection unit including a bump pad and a bump electrically connected to the through-silicon via (TSV);
• bonding the base wafer including the plurality of first chips to a supporting carrier and covering the first connection unit with the supporting carrier;
• providing a plurality of second chips;
• and
• forming stacked chips by bonding the plurality of second chips to the plurality of first chips.

A method of manufacturing a chip-stacked semiconductor package, the method comprising:

• preparing a base wafer including a plurality of first chips each having a first size defined by a first length and a first width, each of the plurality of first chips having a through-silicon via (TSV) and a first connection unit including a bump pad and a bump electrically connected to the through-silicon via (TSV);
• bonding the base wafer to a supporting carrier and covering the first connection unit with the supporting carrier;
• and
• forming stacked chips by bonding a plurality of second chips to the plurality of first chips, the plurality of second chips each having a second size defined by a second length and a second width, that are shorter and narrower than the first length and the first width, respectively.

A method of manufacturing a chip-stacked semiconductor package, the method comprising:

• preparing a base wafer including a plurality of first chips each having a through silicon via (TSV) by a method including:
• providing a semiconductor substrate having a first surface and a second surface opposite the first surface;
• forming the TSV through the semiconductor substrate;
• exposing the TSV to the second surface;
• and
• forming a protection layer and a conductive pad connected to the TSV on the second surface,
• wherein, in the bonding of the base wafer, the first connection unit of the first chip faces the supporting carrier;
• and
• forming stacked chips by bonding one of a plurality of second chips to each of the plurality of first chips.