Method and apparatus for providing a packet buffer random access memory
AssigneeMosaid Technologies Incorporated
InventorDavid E. JONES
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Abstract
The present invention generally provides a packet buffer random access memory (PBRAM) device including a memory array, a plurality of input ports, and a plurality of serial registers associated with the input ports. The plurality of input ports permit multiple devices to concurrently access the memory in a non-blocking manner. The serial registers enable receiving data from the input ports and concurrently packet data to the memory array. The memory performs all management of network data queues so that all port requests can be satisfied within the real-time constraints of network packet switching.
Claims10
A method of packet switching, comprising:
- receiving a packet at a media access control (MAC) controller;
- writing the packet to a packet buffer memory,
- reading a subset of the packet at a classifier to determine an output port and a service priority level;
- selecting an output queue from a plurality of output queues;
- selecting a sub-queue from a plurality of sub-queues of the selected output queue;
- and
- causing the packet buffer memory to write a pointer associated with the packet to a selected sub-queue of a selected output queue;
- the selected output queue being associated with the determined output port;
- and
- the selected sub-queue being associated with the determined service priority level.
Dependencies are inferred from the claim text.