Semiconductor memory device, system having the same and method for generating reference voltage for operating the same

A method for generating a reference voltage, comprising:

• generating a default set signal based on a reset signal and a clock enable signal;
• generating a reference voltage set signal in response to the default set signal;
• and
• generating an internal reference voltage in response to the reference voltage set signal and a driving voltage.

A memory system, comprising:

• a semiconductor memory device;
• a memory controller configured to control the memory device;
• a memory interface configured to communicate between the semiconductor memory device and the memory controller;
• and
• a microprocessor configured to control the memory controller;
• wherein the semiconductor memory device comprises:
• a first decoder configured to generate a default set signal based on a reset signal and a clock enable signal;
• a second decoder configured to generate a reference voltage set signal based on the default set signal;
• and
• a reference voltage provider configured to generate an internal reference voltage based on the reference voltage set signal.