US 2014/0153337 A1 · SEMICONDUCTOR MEMORY DEVICE

Abstract

According to one embodiment, a semiconductor memory device includes memory cells, word lines, a driver circuit, and a control circuit. The memory cells are stacked above a semiconductor substrate, and each includes a charge accumulation layer and control gate. The word lines are coupled to the control gates. The driver circuit repeats a programming operation to write data in a memory cell coupled to a selected word line. In the programming operation, a first voltage is applied to the selected word line, a second voltage to a first unselected word line, and a third voltage to a second unselected word line. The control circuit steps up the first voltage and steps down the second voltage in repeating the programming.

Claims20

Dependent claims

A semiconductor memory device comprising:

a plurality of memory cells including current paths coupled in series, and each including a charge accumulation layer and a control gate, the plurality of memory cells being stacked above a semiconductor substrate;
a plurality of word lines coupled to the control gates;
a driver circuit configured to repeat a programming operation to write data in a memory cell coupled to a selected word line, wherein a first voltage is applied to the selected word line, a second voltage is applied to a first unselected word line, and a third voltage is applied to a second unselected word line, in the programming operation;
and
a control circuit configured to step up the first voltage and step down the second voltage in repeating the programming operation.

2 more elements

Dependencies are inferred from the claim text.

Semiconductor memory device

Life of this patent

Semiconductor memory device

Life of this patent

Abstract

Claims20