Semiconductor memory device having a plurality of chips and capability of outputting a busy signal
AssigneeKabushiki Kaisha Toshiba
InventorsHiroshi NAKAMURA, Kenichi Imamiya, Ken Takeuchi
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Abstract
One package contains a plurality of memory chips. Each memory chip has an I/O terminal which generates a busy signal. The busy signal enables a busy state when a power supply voltage value reaches a specified and guaranteed range after a power-on sequence. The busy signal maintains the busy state until completion of initialization operations for the plurality of memory chips. The busy signal releases the busy state after completion of all initialization operations for the plurality of memory chips.
Claims1
A semiconductor memory device comprising a plurality of memory chips in a package, wherein
- a first busy state takes effect when a power supply voltage reaches a specified value after a power-on sequence;
- said first busy state is maintained until completion of an initialization operation for said plurality of memory chips;
- and
- said first busy state is released after completion of all initialization operations for said plurality of memory chips.
Dependencies are inferred from the claim text.