Termination for complementary signals

A memory device comprising:

• an array of memory cells;
• and
• an input/output circuit coupled to the array of memory cells and configured to facilitate bi-directional communication with the array of memory cells, the input/output circuit comprising:
• a termination transistor configured to receive a pair of signals that are complementary to each other;
• and
• a voltage regulation circuit coupled to a gate of the termination transistor to maintain the termination transistor with a substantially constant resistance during changes in a temperature of the memory device, wherein the regulation circuit comprises:
• an operational amplifier having an input coupled to a constant supply voltage, an input coupled to a temperature varying voltage source, and an output coupled to the termination transistor, the operational amplifier configured to generate a regulated voltage on the output;
• and
• a temperature dependent current source coupled to the temperature varying voltage source and configured to draw a current to ground, from the output of the operational amplifier, that changes with a temperature of the memory device.

A system comprising:

• a memory controller;
• and
• a memory device coupled to the memory controller, the memory device comprising:
• a termination transistor configured to receive complementary signals on each of drain and source nodes;
• and
• a voltage follower circuit coupled to a gate of the termination transistor configured to maintain a regulated voltage during changes in a temperature of the memory device including the voltage follower circuit and/or a supply voltage received by the voltage follower circuit, wherein the voltage follower circuit further comprises
• an operational amplifier having a non-inverting input coupled to a supply voltage, an inverting input coupled to receive a feedback signal and an output, the operational amplifier to generate the regulated voltage on the output;
• a voltage divider circuit coupled between a voltage follower configured transistor, coupled to the output, and a reference voltage node, wherein a node of the voltage divider is coupled to the inverting input of the operational amplifier to generate the feedback signal.