Content addressable memory

A device comprising:

• multiple memory elements configured to store data based on a plurality resistive states;
• and
• a selection transistor configured to in one state electrically couple the multiple memory elements with a matchline, to allow in a match mode selective changes to a voltage level on the matchline based on the data stored by the multiple memory elements and a search word provided to the multiple memory elements.

A device comprising:

• a content addressable memory having an array of memory cells with first and second terminals, the memory cells arranged in a row-column format with each row of the memory cells coupling to a corresponding matchline through first memory cell terminals and each column of the memory cells coupled to a corresponding search line through second memory cell terminals, wherein each row of the memory cells includes multiple memory elements configured to store data based on a plurality of resistive states, the first memory cell terminal of each memory element in a row coupled to a corresponding transistor configured to selectively couple a plurality of the memory elements with the corresponding matchline for at least one row, and wherein the content addressable memory is configured to utilize the matchlines to indicate whether a search word placed on a subset of the search lines matches data stored by at least one row of the memory cells when the memory elements in the at least one row are electrically coupled to the corresponding matchlines.