Symmetrical hexagonal-based ball grid array pattern
AssigneeIntel Corporation
InventorGary Brist
Life of this patent
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Abstract
The present disclosure provides techniques for creating a symmetrical ball grid array pattern for an integrated circuit package. The ball grid array includes a symmetrical pattern of circuit connection points, wherein the symmetrical pattern is derived from a base hexagonal pattern that is repeated in at least one or more sections of the ball grid array.
Claims23
A ball grid array for an integrated circuit package, comprising:
- a symmetrical pattern of circuit connection points, wherein the symmetrical pattern is derived from a base hexagonal pattern that is repeated in at least one or more sections of the ball grid array.
The ball grid array of claim wherein circuit connection points located in corners of the integrated circuit packaging shape continue the hexagonal patterns in each section.
A ball grid array package, comprising:
- a substrate having a top surface and a bottom surface;
- an array of contact pads arranged on the bottom surface of he substrate;
- and
- a plurality of solder balls attached to the contact pads, wherein the contact pads and solder balls are arranged in a symmetrical BGA pattern derived from a standard hexagonal pattern.
A system, comprising:
- a host computing system;
- a printed circuit board coupled to the host computing system;
- and
- an integrated circuit package coupled to the printed circuit board,
- wherein the integrated circuit package is coupled to the printed circuit board via solder balls arranged in a ball grid array pattern and wherein the ball grid array pattern comprises a symmetrical pattern derived from a standard hexagonal pattern,
A method, comprising:
- placing a hexagonal pattern of circuit connection points into a selected portion of an integrated circuit package;
- altering the hexagonal pattern of circuit connection points such that the circuit connection points are not within a predetermined distance to an edge of the portions;
- and
- adding final connection points to a region of the integrated circuit package.
Dependencies are inferred from the claim text.