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US 2014/0153126 A1Published application
Systems and Methods for Old Data Inter-track Interference Compensation
AssigneeLSI Corporation
InventorsGeorge Mathew, Jongseung Park, Erich F. Haratsch, Bruce A. Wilson
Life of this patent
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Abstract
Systems and methods for data processing, and more particularly to estimating or calculating interference between tracks on a storage medium.
Claims20
An inter-track interference compensation system, the system comprising:
- a data buffer operable to store a previous track data set, wherein the previous track data set includes:
- a new component and an old component;
- an inter-track interference generation circuit operable to generate an inter-track interference from the previous track data set on a current track data set, wherein the inter-track interference includes a first interference component corresponding to the new component and a second interference component corresponding to the old component.
A method for inter-track interference compensation, the method comprising:
- receiving a current track data set and a previous track data set, wherein the previous track data set includes:
- a new component and an old component;
- generating an inter-track interference from the previous track data set on the current track data set using an inter-track interference generation circuit, wherein the inter-track interference includes a first interference component corresponding to the new component and a second interference component corresponding to the old component;
- and
- subtracting the inter-track interference from the current track data set to yield a corrected output.
2 more elements
A data storage device, the data storage device comprising:
- a storage medium including at least a previous track and a current data track;
- a head assembly disposed in relation to the storage medium;
- a read channel circuit operable to receive an information set from the storage medium via the head assembly, wherein the information set includes a previous track data set derived from the previous track and a current track data set derived from the current track, the read channel circuit including:
- an inter-track interference generation circuit operable to generate an inter-track interference from the previous track data set on a current track data set, wherein the inter-track interference includes a first interference component corresponding to the new component and a second interference component corresponding to the old component;
- and
- a cancellation circuit operable to subtract the inter-track interference from the current track data set to yield a corrected output.
3 more elements
Dependencies are inferred from the claim text.