Liquid crystal display and method for manufacturing the same

A method for manufacturing a liquid crystal display comprising:

• forming vertical lines and horizontal lines crossing the vertical lines on a substrate and forming a plurality of pixels on the substrate to manufacture a display panel;
• and
• connecting a driver integrated circuit (IC), which supplies a data voltage and a gate pulse to the pixels through the vertical lines, to the display panel,
• wherein the vertical lines include vertical data lines to which the data voltage is supplied, vertical gate lines to which the gate pulse is supplied, and vertical common voltage lines to which a common voltage is supplied,
• wherein the horizontal lines include horizontal gate lines which are connected to the vertical gate lines and receive the gate pulse through the vertical gate lines.

A method for manufacturing a liquid crystal display including a display panel including vertical lines, horizontal lines, and pixels and a driver integrated circuit (IC) supplying a data voltage and a gate pulse to the pixels through the vertical lines, the method comprising:

• forming the horizontal lines using gate metal patterns formed on a substrate of the display panel;
• forming a gate insulating layer on the substrate to cover the horizontal lines;
• stacking semiconductor patterns and source-drain metal patterns on the gate insulating layer to form the vertical lines;
• stacking a first passivation layer and an organic protection layer on the vertical lines and the gate insulating layer;
• forming a common electrode and a link pattern of the pixels formed of a transparent conductive material on the organic protection layer;
• forming a second passivation layer on the common electrode and the link pattern;
• and
• forming pixel electrodes of the pixels on the second passivation layer,
• wherein the vertical lines include vertical data lines to which the data voltage is supplied, vertical gate lines to which the gate pulse is supplied, and vertical common voltage lines to which a common voltage is supplied,
• wherein the horizontal lines include horizontal gate lines which are connected to the vertical gate lines and receive the gate pulse through the vertical gate lines.