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AssigneesTaiwan Semiconductor Manufacturing Company, Ltd., Global Unichip Corporation
InventorChen-Yang Pan
Estimating the term…
Phase offset cancellation circuit and associated clock generator, include a first modifying phase interpolator and a second modifying phase interpolator, and provide a first modified clock and a second modified clock according to a first to a fourth input clocks; wherein the first and the third clocks are of opposite phases. The first modifying phase interpolator performs equal phase interpolation between the first and the second input clocks to generate the first modified clock, and the second modifying phase interpolator performs equal phase interpolation between the third and the fourth input clocks to generate the second modified clock, such that a phase difference between the first modified clock and the second modified clock is of substantially 90 degrees, against phase offsets between the first to the fourth input clocks.
An phase offset cancellation circuit for providing a first modified clock and a second modified clock according to a first input clock, a second input clock and a third input clock, comprising:
A clock generator for providing a first output clock according to a first input clock, a second input clock, a third input clock and a variable weighting, comprising:
Dependencies are inferred from the claim text.