Pulse-based flip flop

A pulse-based flip flop for latching a data input signal in response to a first clock signal and a second clock signal to convert the data input signal to a data output signal, the pulse-based flip flop comprising:

• a pulse generator configured for receiving the first clock signal and generating the second clock signal, the pulse generator comprising:
• a first inverter configured for receiving the first clock signal and outputting the second signal;
• a signal delay circuit electrically connected to the first inverter, configured for receiving the second clock signal and delaying the second clock signal;
• and
• a data latch in response to the first clock signal and the second clock signal, configured for latching the data input signal and generating the data output signal, the data latch comprises:
• a delivery circuit configured for delivering the data input signal;
• a latch circuit electrically connected to the delivery circuit, configured for receiving and latching the data input signal, and also outputting the data output signal;
• and
• a control circuit electrically connected to the latch circuit, configured for providing voltage to control the on and off of the latch circuit.