Three-dimensional integrated circuit having stabilization structure for power supply voltage, and method for manufacturing same

A fabrication method of a three-dimensional integrated circuit which has a first semiconductor chip and a second semiconductor chip stacked on the first semiconductor chip, comprising:

• forming a first semiconductor chip by stacking a transistor layer and a wiring layer which includes a ground wiring layer and a power supply wiring layer;
• forming a second semiconductor chip by further stacking a second ground wiring layer or a second power supply wiring layer by using a part of the first semiconductor chip which is obtained in the step of forming the first semiconductor chip;
• and
• forming a three-dimensional integrated circuit by bonding a surface of the wiring layer of the first semiconductor chip with the second ground wiring layer or the second power supply wiring layer of the second semiconductor chip to be opposite to each other.