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US 2014/0151814 A1Published application
Methods for forming fins for metal oxide semiconductor device structures
AssigneeIntel Corporation
InventorsMartin D. Giles, Tahir Ghani
Life of this patent
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Abstract
Methods are disclosed for forming fins in transistors. In one embodiment, a method of fabricating a device includes forming silicon fins on a substrate and forming a dielectric layer on the substrate and adjacent to the silicon fins such that an upper region of each silicon fin is exposed. Germanium may then be epitaxially grown germanium on the upper regions of the silicon fins to form germanium fins.
Claims20
A method of fabricating a device, comprising:
- forming silicon fins on a substrate;
- forming a first dielectric layer on the substrate and adjacent to the silicon fins such that an upper region of the silicon fins are exposed;
- epitaxially growing germanium on the upper region of the silicon fins.
A method of fabricating a device, comprising:
- forming silicon fins on a substrate;
- epitaxially growing a layer on the silicon fins;
- depositing a first dielectric layer on the substrate;
- planarizing the first dielectric layer such that an upper surface of the silicon fins are exposed and an upper surface of the layer is exposed.
1 more element
A method of fabricating a device, comprising:
- forming silicon fins on a substrate;
- forming a dielectric layer on the substrate and adjacent to the silicon fins such that an upper surface of the silicon fins are exposed;
- selectively etching the exposed upper surface of the silicon fins to a recessed level below upper regions of the dielectric layer.
A complementary metal oxide semiconductor (CMOS) integrated circuit, comprising:
- a n-type metal oxide semiconductor (NMOS) device having a fin with a first height;
- and
- a p-type metal oxide semiconductor (PMOS) device having a germanium fin with a second height and a corresponding silicon fin having a third height.
Dependencies are inferred from the claim text.