Lateral double-diffused mosfet

An LDMOS transistor, comprising:

• a p-type substrate having a surface;
• an n-well implanted in the substrate;
• a gate;
• a source including
• an n-doped n+ region implanted in the n-well,
• a first p-doped p+ region implanted in the n-well and abutting the n+ region, the first p-doped p+ region being on a side of the n+ region closer to the gate,
• a source electrode contacting the n+ region and the first p-doped p+ region;
• and
• a drain including
• a p-doped p-body implanted in the n-well, the p-body having a surface area on the surface,
• a second p-doped p+ region implanted in the p-body, and
• a drain electrode contacting the second p-doped p+ region.

A transistor structure, comprising:

• a p-type substrate having a surface;
• an n-well implanted in the substrate;
• a p-doped p-body implanted in the n-well, the p-body having a surface area on the surface;
• a first transistor including
• a first gate,
• a first source including a first p+ region implanted in the p-body, and a first n+ region implanted in the p-body, the first n+ region being on a side of the first p+ region closer to the first gate, and
• a first drain including a second n-doped n+ region implanted in the p-body;
• a second transistor including
• a second gate,
• a second source including a third n+ region implanted in the n-well, and a second p+ region implanted in the n-well, the second p+ region being on a side of the third n+ region closer to the second gate, and
• a second drain including a third p+ region implanted in the n-well;
• an input line connecting the first gate and the second gate;
• and
• an output line connecting the first n+ region and the third p+ region.