Facet-free strained silicon transistor
AssigneeSTMicroelectronics S.r.l.
InventorsNicolas Loubet, Prasanna Khare, Qing Liu
Life of this patent
Estimating the term…
Loading patent…
AssigneeSTMicroelectronics S.r.l.
InventorsNicolas Loubet, Prasanna Khare, Qing Liu
Estimating the term…
The presence of a facet or a void in an epitaxially grown crystal indicates that crystal growth has been interrupted by defects or by certain material boundaries. Faceting can be suppressed during epitaxial growth of silicon compounds that form source and drain regions of strained silicon transistors. It has been observed that faceting can occur when epitaxial layers of certain silicon compounds are grown adjacent to an oxide boundary, but faceting does not occur when the epitaxial layer is grown adjacent to a silicon boundary or adjacent to a nitride boundary. Because epitaxial growth of silicon compounds is often necessary in the vicinity of isolation trenches that are filled with oxide, techniques for suppression of faceting in these areas are of particular interest. One such technique, presented herein, is to line the isolation trenches with SiN to provide a barrier between the oxide and the region in which epitaxial growth is intended.
1-6. (canceled)
A structure for use in an integrated circuit, the structure comprising:
A transistor comprising:
A silicon transistor, comprising
17-20. (canceled)
Dependencies are inferred from the claim text.