3d rfics with ultra-thin semiconductor materials

A method for forming a three-dimensional integrated circuit, comprising:

• forming one or more surface components on a surface dielectric layer that is on a substrate;
• monolithically forming a passive-layer dielectric material on the surface dielectric layer.
• forming one or more passive components in the passive-layer dielectric;
• monolithically forming additional dielectric material on the passive-layer dielectric;
• forming a gate structure in the additional dielectric material;
• forming a gate dielectric layer on the gate structure and the additional dielectric material;
• forming a thin carbon-based channel material on the gate dielectric;
• forming source and drain regions in electrical contact with the thin channel material to form a transistor;
• passivating the transistor and providing electrical access to the source and drain regions;
• and
• etching the substrate to expose the one or more surface components.