On-chip calibration system and method for infrared sensor

An apparatus comprising:

• a substrate;
• a dielectric stack having:
• a first dielectric layer formed over the substrate;
• a first electrically conductive layer formed over the first dielectric layer that extends between first and second thermopile junctions;
• a second dielectric layer formed over the first electrically conductive layer;
• a second electrically conductive layer formed over the second dielectric layer that extends between the first and second thermopile junctions;
• a third dielectric layer formed over the second electrically conductive layer;
• a resistive layer formed over the third dielectric layer;
• and
• a passivation layer formed over the resistive layer;
• a channel formed in the dielectric stack that extends to the substrate;
• a cavity formed in the substrate that underlies the first thermopile junction and at least a portion of the resistive layer;
• a cap layer formed over the passivation layer, wherein the cap layer substantially seals the channel;
• and
• a calibration circuit that is coupled to the resistive layer, wherein the calibration circuit and resistive layer are configured to heat the first thermopile junction.

A method comprising:

• forming a first dielectric layer formed over a substrate;
• forming a first electrically conductive layer formed over the first dielectric layer that extends between first and second thermopile junctions;
• forming a second dielectric layer formed over the first electrically conductive layer;
• forming a second electrically conductive layer formed over the second dielectric layer that extends between the first and second thermopile junctions;
• forming a third dielectric layer formed over the second electrically conductive layer;
• forming a resistive layer formed over the third dielectric layer;
• coupling the resistive layer to a calibration circuit, wherein the calibration circuit and resistive layer are configured to heat the first thermopile junction;
• and
• forming a passivation layer formed over the resistive layer;
• forming a channel formed in the dielectric stack that extends to the substrate;
• applying an etchant through the channel to form a cavity in the substrate that underlies the first thermopile junction and at least a portion of the resistive layer;
• forming a cap layer over the passivation layer, wherein the cap layer substantially seals the channel.