Method of driving nonvolatile semiconductor device

A method for operating a nonvolatile semiconductor device, the method comprising steps of:

• a step (a) of preparing the nonvolatile semiconductor device, wherein
• the nonvolatile semiconductor device comprises a lower gate electrode film, a ferroelectric film, a semiconductor film, a source electrode, a drain electrode, a first upper gate electrode, and a second upper gate electrode;
• the lower gate electrode film, the ferroelectric film, and the semiconductor film are stacked in this order;
• the source electrode, the drain electrode, the first upper gate electrode, and the second upper gate electrode are formed on the semiconductor film;
• Z direction represents a stack direction of the lower gate electrode film, the ferroelectric film, and the semiconductor film;
• when viewed in a top view, the source electrode and the drain electrode face each other along X direction;
• when viewed in a top view, the first upper gate electrode and the second upper gate electrode face each other along Y direction;
• the X direction and the Y direction are perpendicular to each other;
• both of the X direction and the Y direction are perpendicular to the Z direction;
• a high-resistance area, a first low-resistance area, and a second low-resistance area are formed in the semiconductor film;
• when viewed in a top view, the high-resistance area has a width WRH along the Y direction;
• when viewed in a top view, the first low-resistance area has a width WRL1 along the Y direction;
• when viewed in a top view, the second low-resistance area has a width WRL2 along the Y direction;
• the value of the width WRH is not less than zero;
• the value of the width WRL1 is not less than zero;
• the value of the width WRL2 is not less than zero;
• when viewed in a top view, the high-resistance area, the first low-resistance area, and the second low-resistance area are interposed between the first upper gate electrode and the second upper gate electrode;
• when viewed in a top view, the first low-resistance area is interposed between the first upper gate electrode and the high-resistance area;
• when viewed in a top view, the second low-resistance area is interposed between the second upper gate electrode and the high-resistance area;
• and
• when viewed in a top view, the high-resistance area is interposed between the first low-resistance area and the second low-resistance area;
• a step (b) of applying pulse voltages V1 and V2 to the first upper gate electrode and the second upper gate electrode, respectively, for a period T1 which is shorter than a period necessary to invert all the polarizations included in the ferroelectric film, while voltages Vs, Vd, and V3 are applied to the source electrode, the drain electrode, and the lower gate electrode film, respectively, so as to increase the values of the widths WRL1 and WRL2 and so as to decrease the value of the width WRH, wherein
• the absolute value of the pulse voltage V1 is smaller than that of a voltage necessary to invert all the polarizations included in the ferroelectric film;
• the absolute value of the pulse voltage V2 is smaller than that of a voltage necessary to invert all the polarizations included in the ferroelectric film;
• and
• the voltage Vs, the voltage Vd, the voltage V3, the pulse voltage V1, and the pulse voltage V2 satisfy the following relationship (I):
• Vs,Vd,V3>V1,V2 (I);
• and
• a step (c) of applying the pulse voltages V1 and V2 again to the first upper gate electrode and the second upper gate electrode, respectively, for the period T1, while voltages Vs, Vd, and V3 are applied to the source electrode, the drain electrode, and the lower gate electrode film, respectively, so as to increase the values of the widths WRL1 and WRL2 more and so as to decrease the value of the width WRH more.